Digital Signal Processors (DSP)

Digital Signal Processors (DSP)

Industry: Semiconductors

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Digital Signal Processors (DSP)

serial access memory mask (SAMMASK)

Semiconductors; Digital Signal Processors (DSP)

A serial register transfer (SRT) controller register that contains a string of continuous 1s. The number and position of these 1s depend on the video RAM (VRAM) serial access memory (SAM) width and ...

block repeat active flag (BRAF) bit

Semiconductors; Digital Signal Processors (DSP)

A field that indicates a block repeat is currently active. This bit is normally set when the repeat block (RPTB) instruction is executed and is cleared when the block repeat counter register (BRCR) ...

merge mode

Semiconductors; Digital Signal Processors (DSP)

A serial register transfer (SRT) mode for the video controller (VC) during which an image is captured and stored in memory. Memory locations not corresponding to the captured image are preserved. See ...

enable multiple TREGs (TRM) bit

Semiconductors; Digital Signal Processors (DSP)

A field that indicates if a load TREG0 (LT/A/D/P/S) instruction loads only temporary register 0 (TREG0) or loads all three of the temporary registers (TREG0, TREG1, and TREG2) to maintain ...

display mode

Semiconductors; Digital Signal Processors (DSP)

A serial-register-transfer (SRT) mode during which information is transferred from the frame memory to the display device. See also capture mode; merge mode.

clock polarity (CLKP) bit

Semiconductors; Digital Signal Processors (DSP)

A field that indicates when the data is sampled by the receiver and sent by the transmitter. At reset, CLKP = 0. This bit is stored in the buffer serial port control extension register (SPCE).