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Digital Signal Processors (DSP)

Contributors in Digital Signal Processors (DSP)

Digital Signal Processors (DSP)

internal transmit clock division factor (CLKDV) bits

Semiconductors; Digital Signal Processors (DSP)

A field that determines the internal transmit clock duty cycle. At reset, CLKDV = 00011. These bits are stored in the buffered serial port (BSP) control extension register (SPCE).

graphical user interface (GUI)

Semiconductors; Digital Signal Processors (DSP)

A screen format that provides windows, menus, dialog boxes, icons, lists, and options that allow you to start a program or perform a task by pointing to a pictorial representation, selecting an item ...

frame synchronization polarity (FSP) bit

Semiconductors; Digital Signal Processors (DSP)

A field that determines the status of the frame synchronization pulses. At reset, FSP = 0. This bit is stored in the BSP control extension register (SPCE).

current-field cursor

Semiconductors; Digital Signal Processors (DSP)

A screen icon that identifies the current field in the active window.

DSP interrupt (DSPINT) bit

Semiconductors; Digital Signal Processors (DSP)

A field that enables and/or disables an interrupt from a host processor to the DSP. The DSPINT bit is written from the host processor; a DSP write has no effect on the DSPINT bit. When DSPINT = 1, a ...

input section

Semiconductors; Digital Signal Processors (DSP)

A section from an object file that is linked into an executable module.

circular buffer 1 enable (CENB1) bit

Semiconductors; Digital Signal Processors (DSP)

A field that enables/disables circular buffer 1. At reset, CENB1 = 0. This bit is stored in the circular buffer control register (CBCR).

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