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Digital Signal Processors (DSP)

Contributors in Digital Signal Processors (DSP)

Digital Signal Processors (DSP)

program read bus (PRDB)

Semiconductors; Digital Signal Processors (DSP)

An internal bus that carries instruction code and immediate operands, as well as table information, from program memory to the CPU.

least significant byte (LSByte)

Semiconductors; Digital Signal Processors (DSP)

The byte in a multibyte word that has the least influence on the value of the word.

stack

Semiconductors; Digital Signal Processors (DSP)

A block of memory reserved for storing return addresses for subroutines and interrupt service routines.

wait state

Semiconductors; Digital Signal Processors (DSP)

A period of time that the CPU must wait for external program, data, or I/O memory to respond when reading from or writing to that external memory. The CPU waits one extra cycle for every wait state.

data-read address bus (DRAB)

Semiconductors; Digital Signal Processors (DSP)

An internal bus that carries the address for each read from data memory.

mixed mode

Semiconductors; Digital Signal Processors (DSP)

A debugging mode that simultaneously shows both assembly language code in the DISASSEMBLY window and C code in the FILE window.

host port interface control (HPIC) register

Semiconductors; Digital Signal Processors (DSP)

A register that controls the operation of the host port interface (HPI).

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