Digital Signal Processors (DSP)

Digital Signal Processors (DSP)

Industry: Semiconductors

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Digital Signal Processors (DSP)

blocked

Semiconductors; Digital Signal Processors (DSP)

The state of a task that is not ready to execute. A task can be blocked either by being suspended or by voluntarily choosing to wait for an event such as the arrival of a message or signal.

Input 0 bit. A field that allows the receive clock input (CLKR) pin to be used as an input. IN0 reflects the current level of the CLKR pin of the device. This bit is stored in the serial port control ...

cache miss

Semiconductors; Digital Signal Processors (DSP)

The state or condition in which the cache does not contain the requested instruction or data word.

IN1 bit

Semiconductors; Digital Signal Processors (DSP)

Input 1 bit. A field that allows the transmit clock input/output (CLKX) pin to be used as an input. IN1 reflects the current level of the CLKX pin of the device. This bit is stored in the section ...

cache hit

Semiconductors; Digital Signal Processors (DSP)

The state or condition in which the cache memory contains the requested instruction or data word.

model statement

Semiconductors; Digital Signal Processors (DSP)

Instructions or assembler directives in a macro definition that are assembled each time a macro is invoked.

cache coherency

Semiconductors; Digital Signal Processors (DSP)

The state or condition in which the contents of one or more cache memories consistently and accurately represent the corresponding contents of the external memory.