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Digital Signal Processors (DSP)
Industry: Semiconductors
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Digital Signal Processors (DSP)
test/control (TC) flag bit
Semiconductors; Digital Signal Processors (DSP)
A 1-bit flag that stores the results of the arithmetic logic unit (ALU) or parallel logic unit (PLU) test bit operations. The TC bit is affected by the APL, BIT, BITT, CMPR, CPL, LST #1, NORM, OPL, ...
TDM receive/transmit address register (TRTA)
Semiconductors; Digital Signal Processors (DSP)
A memory-mapped register that specifies to which device(s) on the four-wire serial bus a given device can transmit. The lower byte of the TRTA specifies the receive address (RA) of the device and the ...
PIO mode
Semiconductors; Digital Signal Processors (DSP)
Programmed input/output mode. A mode of the audio codec in which direct memory access (DMA) is not used; rather, samples are directly read from or written to the PIO port.
receive ready (RRDY) bit
Semiconductors; Digital Signal Processors (DSP)
A 1-bit flag that transitions from 0 to 1 to indicate the data receive shift register (RSR) contents have been copied to the data receive register (DRR) and that data can be read. A receive interrupt ...
BSP transmit buffer size register (BKX)
Semiconductors; Digital Signal Processors (DSP)
A memory-mapped register that stores the address block size for reading a word to be transferred from internal memory to the data transmit register (DXR). When autobuffering is enabled (BXE = 1), the ...
children
Semiconductors; Digital Signal Processors (DSP)
Additional windows opened for aggregate types that are members of a parent aggregate type displayed in an existing DISP window. (These windows are part of the standard graphical user interface for ...
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