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Digital Signal Processors (DSP)

Contributors in Digital Signal Processors (DSP)

Digital Signal Processors (DSP)

expression

Semiconductors; Digital Signal Processors (DSP)

One or more operations in assembler programming represented by a combination of symbols, constants, and paired parentheses separated by arithmetic operators.

receive buffer half received (RH) bit

Semiconductors; Digital Signal Processors (DSP)

A 1-bit buffered serial port (BSP) flag that indicates which half of the receive buffer has been received. At reset, RH = 0. This bit is stored in the BSP control extension register (SPCE).

wait-state control register (CWSR)

Semiconductors; Digital Signal Processors (DSP)

A memory-mapped register that controls the mapping of the program/data wait-state register (PDWSR), the input/output port wait-state register (IOWSR), and the number of wait states. At reset, CWSR = ...

interlist utility

Semiconductors; Digital Signal Processors (DSP)

A utility that inserts your original C source statements as comments into the assembly language output from the assembler. The C statements are inserted next to the equivalent assembly instructions.

overflow mode (OVM) bit

Semiconductors; Digital Signal Processors (DSP)

A 1-bit field that determines if an overflow in the arithmetic logic unit (ALU) wraps around or saturates. This bit is stored in status register 0 (ST0).

circular buffer control register (CBCR)

Semiconductors; Digital Signal Processors (DSP)

A memory-mapped register that enables/disables the circular buffers (CENB1 and CENB2 bits) and defines which auxiliary registers (CAR1 and CAR2 bits) are mapped to the circular buffers.

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