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Digital Signal Processors (DSP)
Industry: Semiconductors
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Digital Signal Processors (DSP)
dimensioned transfer
Semiconductors; Digital Signal Processors (DSP)
A transfer consisting of sources and/or destinations that can be a simple contiguous linear sequence of data bytes or can consist of a number of such regions. See also guided transfer.
cache subblock
Semiconductors; Digital Signal Processors (DSP)
One of four partitions of a cache block. Cache subblocks are the unit of memory brought into a cache on a subblock miss. Each subblock has a present bit (and a dirty bit for master processor (MP) ...
offset-guided look-up table transfer
Semiconductors; Digital Signal Processors (DSP)
Type of guided transfer in which the guide table consists of values to be left-shifted (zero-filled) by zero, one, two, or three bits and added to a base address given in the packet transfer ...
overflow flag (OV) bit
Semiconductors; Digital Signal Processors (DSP)
1) A status bit that indicates whether or not an arithmetic operation has exceeded the capacity of the corresponding register. 2) Bit 12 of status register ST0; indicates whether the result of an ...
serial access memory (SAM)
Semiconductors; Digital Signal Processors (DSP)
A memory array in video RAM (VRAM) that can be accessed through serial register transfer cycles. See SRT controller, video random access memory (VRAM).
guided transfer
Semiconductors; Digital Signal Processors (DSP)
A transfer in which the sequence of dimension addresses is guided from an on-chip memory table, rather than calculated solely from values within the packet transfer parameters. See also dimensioned ...
miscellaneous operation
Semiconductors; Digital Signal Processors (DSP)
One of several operations that do not involve the data unit, including nop, eint, and dint. The data unit portion of the opcode is used to specify the operation.
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