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Digital Signal Processors (DSP)
Industry: Semiconductors
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Digital Signal Processors (DSP)
offset-guided transfer
Semiconductors; Digital Signal Processors (DSP)
Type of source-guided transfer in which the guide table consists of values to be added to a base address given in the packet transfer parameters to form the starting address of each patch. See also ...
named section
Semiconductors; Digital Signal Processors (DSP)
1) An initialized section that is defined with a .sect directive; 2) an uninitialized section that is defined with a .usect directive.
load color register (LCR) cycle
Semiconductors; Digital Signal Processors (DSP)
A memory cycle generated by the transfer controller (TC) that writes a specified value into the video RAM (VRAM’s) color registers for use during a block-write cycle. LCR cycles are supported only on ...
packet transfer (PT)
Semiconductors; Digital Signal Processors (DSP)
A transfer of data blocks between two areas of memory. The multimedia video transfer (MVP) supports packet transfers of one, two, or three dimensions. See also dimensioned transfer, guided transfer.
.data section
Semiconductors; Digital Signal Processors (DSP)
One of the default common object file format (COFF) sections. The .data section is an initialized section that contains initialized data. You can use the .data directive to assemble code into the ...
short offset
Semiconductors; Digital Signal Processors (DSP)
Unsigned 3-bit immediate index for halfword or word transfers; unsigned 4-bit immediate index for byte transfers. A short offset can be used in an addressing mode for any other operations specified ...
tag
Semiconductors; Digital Signal Processors (DSP)
1) An optional type name that can be assigned to a structure, union, or enumeration. 2) A register holding the address of the cache block.