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Test equipment

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Test equipment

physical layer (PHY)

Semiconductors; Test equipment

The bottom layer of the OSI and ATM protocol stack, which defines the interface between the different physical media. The PHY consists of two sublayers: the transmission convergence (TC) sublayer and ...

PCI Industrial Computer Manufacturers Group (PICMG)

Semiconductors; Test equipment

The group of member companies that maintains current specifications for CompactPCI and PCI/ISA.

parallel In serial out (PISO)

Semiconductors; Test equipment

Refers to a shift register in which the data is loaded in parallel and read out serially.

peak inverse voltage (PIV)

Semiconductors; Test equipment

The maximum rated value of a AC voltage acting in the direction opposite to that in which a device is designed to pass current.

programmable logic array (PLA)

Semiconductors; Test equipment

The most user-configurable of the traditional programmable logic devices, because both the AND and OR arrays are programmable.

power line cycle (PLC)

Semiconductors; Test equipment

As the name implies, this is the length of time it takes the AC power supply to complete one cycle (20 ms for 50 Hz systems and 16.7 ms for 60 Hz systems).

plastic leaded chip carrier (PLCC)

Semiconductors; Test equipment

A plastic IC package for surface mounting applications that has leads, generally “J” leads, on all fours sides (sometimes given as PCC or PLDCC).

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